Computer Architecture family

Paper details

Control Unit Architecture & Design Capstone Mini-Project: 1. Choose 1(one) Computer Architecture FAMILY. (either: Processor family: x86 Sun SPARC Nvidia GPU ARM MIPS Database engines IP Router engines Computer family: IBM 360 IBM mainframe DEC PDP DEC VAX Raspberry Pi Apple i-* Android SOC (sys-on-a-chip) Supercomputer arch: Top 5-10 HPC arch ) 2. Write an organized report about the Family a. History and Evolution generations for each of: P : processors M : memory S : communication C : control & coordination IO: input & output Chip implementations, tech b. Discuss if the family was targeted or specialized, customized for particular application areas. c. How various architectural concepts were implemented (or deliberately excluded) in the family: Pipelining Superscalar ILP Caching Control Unit Architecture & Design Capstone Mini-Project: 1. Choose 1(one) Computer Architecture FAMILY. (either: Processor family: x86 Sun SPARC Nvidia GPU ARM MIPS Database engines IP Router engines Computer family: IBM 360 IBM mainframe DEC PDP DEC VAX Raspberry Pi Apple i-* Android SOC (sys-on-a-chip) Supercomputer arch: Top 5-10 HPC arch ) 2. Write an organized report about the Family a. History and Evolution generations for each of: P : processors M : memory S : communication C : control & coordination IO: input & output Chip implementations, tech b. Discuss if the family was targeted or specialized, customized for particular application areas. c. How various architectural concepts were implemented (or deliberately excluded) in the family: Pipelining Superscalar ILP Caching Control Unit Architecture & Design Capstone Mini-Project: 1. Choose 1(one) Computer Architecture FAMILY. (either: Processor family: x86 Sun SPARC Nvidia GPU ARM MIPS Database engines IP Router engines Computer family: IBM 360 IBM mainframe DEC PDP DEC VAX Raspberry Pi Apple i-* Android SOC (sys-on-a-chip) Supercomputer arch: Top 5-10 HPC arch ) 2. Write an organized report about the Family a. History and Evolution generations for each of: P : processors M : memory S : communication C : control & coordination IO: input & output Chip implementations, tech b. Discuss if the family was targeted or specialized, customized for particular application areas. c. How various architectural concepts were implemented (or deliberately excluded) in the family: Pipelining Superscalar ILP Caching